PowerEdge 1950 ECC question...
tim at seoss.co.uk
Wed Feb 3 14:03:53 CST 2010
Henrik Schmiediche wrote:
> My original question (turning of ECC for memory testing) was hopefully going to narrow down the issue.
It's probably possible to disable ECC after boot time using setpci (I've
used it to read and write the ECC status registers on Intel chipsets in
the past), but I don't know the details of the i5000 ECC implementation
(I don't even know if the ECC functionality is still controlled via PCI
Configuration space) - you'll have to check the datasheet (or the
i5000_edac driver source).
ISTR, memtest86 and memtest86+ both had some functionality for
reading/writing ECC status bits on some chipsets as well, so you could
hack on these too (but the code was a bit messed up last time I looked -
I think ECC "no", and ECC "NO" had different meanings!)...
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