kernel vs. Debian/Red Hat/SuSE e.t.c.?
kuba at mareimbrium.org
Thu Apr 26 15:19:23 CDT 2007
On Thursday 26 April 2007, Robert Wilson wrote:
> As I pointed out, I'm not out for any sort of release wars.
> . . .
> >>My current kernel is 2.6.20-7 and I see 2.6.21 has just been released.
> >>have 2.6.21 built and tested in probably a couple of days. But I get the
> >>impression that Red Hat is a further back and have no idea of the other
> >>common Linux packages.
> >Correct observation, . . .. Is there something in particular which you
> > need from a current released Debian kernel that's not present on a
> > currently released RedHat kernel?
> A fair question. My application is network testing, primarily using iPerf
> to stress test routers, firewalls and circuits. This is very I/O intensive
> and the performance limitations are a function of: (1) network interface
> card, (2) device driver, (3) CPU/IO architecture, (4) kernel dispatching
> and (5) task dispatching.
You'd be probably wanting to run your packet source (and receiver, if
necessary) as a kernel module, to avoid kernel<->userspace copying. I don't
know about iPerf, but network stress testing and userspace don't quite mesh
in my opinion. You're looking at a hard realtime processing. I've had no
problems getting two gigabit interfaces satuated with packets of any size
from a kernel module written just for that (all it did was to create a buffer
full of packets and keep sending them out).
In the long run, using a Linux host with a network adapter for that is a bit
of an overkill. You'd get much better (read: hard real-time repeatable)
results by using a logic analyzer with some high speed pattern generator to
send data. Those are easy to interface to ethernet wiring, requiring just the
GMII 1000-T PHY. A GMII interface is perfect to be driven/read with a logic
analyzer. To send, you need 8 bits of data, a data valid (enable) line, a
transmit corruption line, and a clock. It's all synchronous, working at
125MHz. Even *old* logic analyzers will handle that. The management interface
setup is trivially done from a logic analyzer as well (it's only two lines).
It's possible to buy evaluation boards with GMII PHYs, so no soldering
required. Just attach the power supply and the pattern generator's pod and
you're done. That's an order of magnitude (or better!) cheaper than
gigabit-capable hardware network analyzers. You can get a logic analyzer
necessary to send this stuff for $1000 on eBay, plus maybe $150 for the
evaluation board. You get the logic analyzer as a freebie, in addition to a
solid source of Ethernet traffic.
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