how to check/enable Intel C4=deeper sleep state on my Dell Inspiron 9400?
Nicolae Gorgoteanu
shadowhdd at gmail.com
Fri Dec 21 00:38:36 CST 2007
Hello,
Please excuse me if I post in a wrong post here. I already have post
here http://lists.us.dell.com/pipermail/linux-desktops/2007-December/000837.html
Because is a question / problem of BIOS, I think that here are the
specialist in BIOS disassembly / understanding. I am just a common
Linux user.
My question: is C4 enabled in my laptop DELL Inspiron 9400, type
MP061; bios ver A09?
or do I need that after every boot to run # setpci -s 00:1f.0 a0.w=a8
I read/understood that after BIOS loads the OS, then it gives control
to OS( Linux kernel). So then Linux is clever and copy BIOS firmware
in memory, just in future to do not call BIOS from EPROM again.
Because BIOS routines are 8 biti back compatible to all old PC, my
Linux will simulate(on 64 biti) all BIOS functions for my SMP CPU, and
also has IALT unassembled the BIOS in ram to read the BIOS parameters
and capabilities. This means that, in theory, Linux can give commands
that are not enabled in a dummy BIOS, if commands are understood by
the motherboard controllers. So I think, no need to upgrade/flash the
BIOS firmware, if you know where in RAM to patch on the fly some bits.
Of course that I prefer a good BIOS.
Unfortunate, with powertop from
http://www.lesswatts.org/projects/powertop/ i see only C0..C3 sleep
states for my Intel Core 2 Duo T5500.
(Also it seems in my dmesg log that my SATA150 HDD is see as an ATA
100, maybe not bios fault but Linux kernel module.)
"Hello;
I found with Google this post:
http://www.bughost.org/pipermail/power/2007-June/000652.html
it is about "CPU C4 vs. C3 states, BIOS support and 1.5W power savings"
>I have an ICH7-M (82801GBM) motherboard, downloaded the datasheet for
>it (30701303.pdf), and on page 419 I see there is a bit C4onC3_EN in
>GEN_PMCON_1 register, that does the remapping Arjan talked about.
>Using lspci -xxx -s 00:1f.0 I found out that it was disabled (and so
>was Intel SpeedStep)!
the interesting summary which I did:
Turn on C4onC3_EN, and speedstep, witch will put an A8 in place of 20
at adress offset A0;
sid:/home/nick# setpci -s 00:1f.0 a0.b=a8
sid:/home/nick# lspci -xxx -s 1F.0
00:1f.0 ISA bridge: Intel Corporation 82801GBM (ICH7-M) LPC Interface
Bridge (rev 01)
00: 86 80 b9 27 07 01 10 02 01 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 cd 01
30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00
40: 01 10 00 00 80 00 00 00 81 10 00 00 10 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 84 85 89 83 91 00 00 00 8a 8b 89 87 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 10 00 00 1c 01 09 7c 00 00 00 00 00 81 0c 3c 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: a8 06 00 00 00 00 00 00 13 1c 0a 00 00 03 00 00
b0: 00 00 f0 00 00 00 00 00 00 00 09 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 c0 c0 00 00 00 00 00 00
e0: 09 00 0c 10 b4 02 24 17 00 00 00 00 00 00 00 00
f0: 01 80 00 f4 00 00 00 00 86 0f 02 00 00 00 00 00
sid:/home/nick# uname -a
Linux sid 2.6.24-rc5-git3-slh64-smp-4 #1 SMP PREEMPT Fri Dec 14
00:28:27 UTC 2007 x86_64 GNU/Linux
thank you
nick"
More information about the libsmbios-devel
mailing list